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Opening 3103hw

Hardware Engineer

3103hw - Research & Development
Oakland, CA, US

Design and implement circuit packs for carrier class telecom equipment. Schematic capture in Viewlogic, FPGA design (VHDL), high speed digital design skills and analog design skills are required. The successful candidate will have demonstrated that s/he can perform as sole HW engineer responsible for the full HW lifecycle from board level schematic capture, programmable logic design, simulation and test, placement and routing review, writing and releasing the programmers reference manual, board bring-up and agency approval. The access technologies that Zhone is bringing to market range from legacy POTs interfaces to OC48 UPSR and Gigebit RPR. In between are PON offerings for both ONU and OLT platforms and of course all forms of DSL. Also, a key strategic direction for Zhone is our triple play lineup of products integrating voice, IP video and data in a single platform with DSL and PON network interfaces. The successful candidate must be a skilled telecom HW engineer with a track record of delivering dense boards using commercial silicon from a variety of vendors specializing in Network Processors, dense DSP designs, custom AFE's matched to very dense xDSL chipsets or TDM/ATM based framers and switches.

Minimum Qualifications and Education

BSEE and 8+ years as telecom equipment HW designer. Experience with external Telecom interfaces: DS3/E3, SONET/SDH, OC3/12/48, STM1/4/12, T1, ATM, Ethernet 10/100/1000, PON (OLT/ONU), ADSL, ADSL S=1/2, ADSL2+, SHDSL. Experience implementing systems which support line and module level redundancy is an asset.

For immediate consideration email your resume to jobs@zhone.com (please indicate job ID 3103hw in the subject line).

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